PROGRAM
Tue 19 Wed 20 Thu 21
08:00-08:30 Registration
08:30-08:45 Welcome
Chairperson: Samuele Sciarrillo (STMicroelectronics, Italy)
08:45-09:25 KEYNOTE How STMicroelectronics leverages materials for developing sustainable technologies and Edge AI products Serge Nicoleau,
STMicroelectonics, France
S1-Metallization I
Chairperson: Fabrice Nemouchi (CEA-Leti, France)
09:25-09:55 INVITED Alternative Metallization: Benefits and Concerns Ivan Ciofi,
IMEC, Belgium
09:55-10:15 Atomic Layer Deposition of Cobalt at Low Temperatures Mathias Franz,
Fraunhofer ENAS, Germany
10:15-10:35 Development of Novel Selective Barrier Metal for Low Via Resistance in Cu Damascene EunJi Jung,
Samsung Electronics, South Korea
10:35-10:55 Break
S2-Power devices
Chairperson: Daniel Alquier (Université de Tours, France)
10:55-11:25 INVITED Si and Mg ion implantation for doping of GaN grown on silicon Mariane Coig,
CEA-leti, France
11:25-11:55 INVITED Low damage Etching processes developments for GaN-based devices patterning Simon Ruel,
CEA-LETI, France
11:55-12:15 Forward conduction mechanism at W-based Schottky contacts on AlGaN/GaN heterostructures Simone Milazzo,
University of Catania, Italy
12:15-12:35 From sapphire to engineered Si substrates for Ga2O3 heteroepitaxy: theory indications to avoid large lattice misfits Leo Miglio,
University of Milano-Bicocca, Italy
12:35-13:45 Lunch
S3-Patterning technologies
Chairperson: Samuele Sciarrillo (STMicroelectronics, Italy)
13:45-14:15 INVITED Direct Metal Etch and Semi-Damascene Integration of Ruthenium: A Game-changer for interconnects Giulio Marti,
IMEC, Belgium
14:15-14:45 INVITED Cyclic etching processes for high selectivity and low plasma induced damage François Boulard,
CEA-LETI, France
14:45-15:05 Study of metal line patterning strategy for 300 mm superconducting BEOL Thibaut Chêne,
CEA LETI, France
15:05-15:25 Break
S4-Simulations and Modelling techniques
Chairperson: Stefan E. Schulz (TU-Chemnitz, Germany)
15:25-15:55 INVITED Simulating conditions for the atomic level processing of metals Simon Elliott,
Schrödinger , Ireland
15:55-16:25 INVITED Advanced Characterisation and Modelling for Degradation Processes in Copper BEoL Stacks of next-generation Power Devices Andre Clausner,
Fraunhofer IKTS Dresden, Germany
16:25-16:45 Carrier profiles measurements on 4H-SiC MOSFETs by Scanning Spreading Resistance Microscopy and Scanning Capacitance Microscopy Marco Zignale,
CNR-IMM, Italy
S5-Advanced Characterization & Metrology I
Chairperson: Dominique Mangelinck (IM2NP, France)
16:45-17:15 INVITED Low energy electron microscopy: from basic principles to surface dynamics of semiconductors Frédéric Leroy,
CINaM, France
17:15-17:35 Multi-step Siconi pre-clean advantages for Ni(Pt)Si film formation in the frame of advanced FDSOI technology development Magali Gregoire,
STMicroelectronics, France
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